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Safe CFLAGS for Giada N20 (Intel Atom D525)
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VinzC
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PostPosted: Thu Jul 14, 2011 3:31 pm    Post subject: Safe CFLAGS for Giada N20 (Intel Atom D525) Reply with quote

Hi all.

I have acquired a Giada N20 media center, it's a slim PC machine with lots of hardware features and an Atom D525 (the review specifies D520 but it's a D525 in mine). Obviously it runs with Fedora x86_64 so it must support all the code of a Core2 Duo. But are there special CFLAGS for that kind of processor? (I'm using GCC 4.4* so far but I don't exclude installing a cross-dev chain with GCC-4.5*.

Thanks in advance for any hint/suggestion.
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PostPosted: Thu Jul 14, 2011 4:06 pm    Post subject: Reply with quote

I hope you already had a look at wiki.
I am using CFLAGS="-march=core2 -mtune=generic -O2 -pipe" on my D510 - works fine, but surely it could be more optimized. To be honest I am to lazy to mess around with it.

If you would go with gcc-4.5, then -march=atom would be an option.
If you would drop the cross-dev requirements, then go with -march=native -O2 -pipe.

Quote:
Obviously it runs with Fedora x86_64 so it must support all the code of a Core2 Duo.
How do you come to that conclusion? AFAIK all binary distributions are compile with the equivalent -march=x86_64, so no processor specific optimization.
Try running -march=core2 code on a Athlon Processor - works fine, until you hit SSSE3 instructions.

HTH
V.
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PostPosted: Thu Jul 14, 2011 7:08 pm    Post subject: Reply with quote

Veldrin wrote:
I hope you already had a look at wiki.

Yup. Hence I'm asking. Wasn't too sure how different or common the D525 is.


Veldrin wrote:
I am using CFLAGS="-march=core2 -mtune=generic -O2 -pipe" on my D510 - works fine, but surely it could be more optimized. To be honest I am to lazy to mess around with it.

If you would go with gcc-4.5, then -march=atom would be an option.
If you would drop the cross-dev requirements, then go with -march=native -O2 -pipe.

Thanks will try the first option first. Maybe I'll then setup a cross-compile chain if I'm daring enough. Let's see how fast it gets with those settings.


VinzC wrote:
Obviously it runs with Fedora x86_64 so it must support all the code of a Core2 Duo.

Veldrin wrote:
How do you come to that conclusion?

Hmmmwell, you're right, that was not my cleverest assertion. :D

Just an educated guess, in fact. I have both i686 and x86_64 versions of Fedora on my USB key and I dared select the 64-bit one. I was surprised it didn't say "This Linux kernel requires a 64-bit CPU". And since I knew the D525 is a dual core, I extrapolated it could be compatible with a Core2 Duo, of course I didn't mean the full instruction set of a Core2. Although... as Atom and Core2 are both Intel my assumption seemed to make sense to me. Maybe at most :D .

Anyway here's the CPU info.

cat /proc/cpuinfo:
[...]
processor       : 3
vendor_id       : GenuineIntel
cpu family      : 6
model           : 28
model name      : Intel(R) Atom(TM) CPU D525   @ 1.80GHz
stepping        : 10
cpu MHz         : 1800.000
cache size      : 512 KB
physical id     : 0
siblings        : 4
core id         : 1
cpu cores       : 2
apicid          : 3
initial apicid  : 3
fpu             : yes
fpu_exception   : yes
cpuid level     : 10
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts rep_good aperfmperf pni dtes64 monitor ds_cpl tm2 ssse3 cx16 xtpr pdcm movbe lahf_lm
bogomips        : 3599.78
clflush size    : 64
cache_alignment : 64
address sizes   : 36 bits physical, 48 bits virtual
power management:

It looks like there are two cores each with hyperthreading enabled! Wow!
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PostPosted: Thu Jul 14, 2011 7:33 pm    Post subject: Reply with quote

Quote:
It looks like there are two cores each with hyperthreading enabled! Wow!

Looks impressing at first, but my 4 years old notebook with T7500 (Core2 2.2GHz) is/was still faster (CPUwise).
With the NVidia chip, this makes a decent (and hopefully quiet) HTPC.

Quote:
Yup. Hence I'm asking. Wasn't too sure how different or common the D525 is.

Just have a look on the Intel Page (D525,D510).
The only difference I could find (at a first glace) is that D525 supports SO-DDR3, while the D510 only supports DDR2.

V.
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PostPosted: Sat Jul 16, 2011 1:51 pm    Post subject: Reply with quote

The beast is quiet indeed. It comes however with DDR2 memory instead of DDR3.

I compared some processors I have had on laptops and there are a few differences. The one that startles me is about SSE instructions: the Core2 Duo in the chart aren't marked with any of SSE set although the one I have now (the 9400) has SSE, SSE2, SSSE3 (no SSE3) and SSE4_1.

Instead of installing a cross-compile chain, which I happen to find boring :D , I'd like to build a native Giada system in a chrooted environment on my T9400-CPU laptop, a la Tiny Gentoo, if you know what I mean. It looks like my current CPU shares the same SSE flags with the D535 (except SSE4_1). The only thing that raises my attention is that “Embedded Options Available”.

I suppose that should work, right?
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PostPosted: Sat Jul 16, 2011 2:47 pm    Post subject: Reply with quote

Should work. The CPU defines, what instruction are available, and can be executed. If you decide not to use them (e.g less optimized -march option), then it will just not use them.
As a little sidenote - I recently ran into trouble because I wanted to run core2 optimized on an AMD Bacelona. This works fine, as long as the those specialized instruction (SSE/MMX are generally used in conjunction with multimedia) are not used. I ended up wondering why KDE would not start, and any webbrowser would crash instantly, untill I found out, that core2 enables SSSE3 which is not suported by an AMD Barcelona....
Luckily it was a cloned system, so I did not spend to much time troubleshooting.

and core2 and atom support SSE3. for historic reasons it is called pni (Prescott New Instructions).

I am not sure, what the implication of 'embedded' means in that case. I could imagine, that it is either durability or that the CPU is available for a long time.


V.

PS. Interesting setup this Tiny Gentoo - I might look into it.
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PostPosted: Sat Jul 16, 2011 6:36 pm    Post subject: Reply with quote

Thanks a lot Veldrin.

Sounds logical to experience issues between two CPU founders. Now it seems less likely to occur on Intel CPU I guess. I'll try, just out of curiosity and report here.

Do you happen to know if there are tables comparing instruction sets between processors? I guess this would yield a huge table so I expect it doesn't exist. I mean may I safely assume the differences between generations of Intel CPU are minor and mainly consist of those SSE instructions?

I've googled around and looked up in Wikipedia but couldn't find much relevant. All I could find so far focuses on those “multimedia instructions”. I'm tempted to assume these are the only differences...

Veldrin wrote:
I am not sure, what the implication of 'embedded' means in that case. I could imagine, that it is either durability or that the CPU is available for a long time.

I thought about embedded electronic devices in fact. But I might be mistaken.
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PostPosted: Sat Jul 16, 2011 7:44 pm    Post subject: Reply with quote

Quote:
I thought about embedded electronic devices in fact. But I might be mistaken.
True - I was more referring to what side conditions need to be met, that a processor is flagged as embedded.

I looked around, but I am unable to find a complete list. Wikipedia gives an nice summary from AMD processors, but the Intel once are a bit more spread out.
Also man gcc gives you a nice overview what options get activated with each march option. (search for core2 to get to the right spot)

I guess the instruction sets can be split into 2 categories: base instruction sets and additional instruction sets.
The base instructions are used in 90% of cases (especially integer instructions), while the additional instruction sets are used in very rare cases (mainly multimedia)

    Base Instruction Sets
  • i386
  • i486
  • i586 (pentium)
  • i686 (pentium pro)
  • x86_64 (64bit, includes MMX, SSE, SSE2)

all ix86 instruction sets were designed by Intel, while x86_64 was the first 64-bit implementation, and done by AMD.

    Additional Instruction Sets
  • MMX (multimedia extensions)
  • 3dNow! (AMD only, similar to MMX)
  • 3dNow!ext (AMD only)
  • SSE (streaming SIMD Extension, vector calculations, single instruction multiple data (SIMD))
  • SSE2
  • SSE3 (pni, prescott new instructions)
  • SSE4.1
  • SSE4.2
  • SSE4a (AMD only)
  • AVX (Advanced Vector Extensions, widened vector instructions)

Most of those extension sets are designed by Intel, and they being the market leader, AMD was somehow forced to include these instructions in their CPUs.
And AMD is dropping the 3dNow!/3dNow!ext support in their new CPUs causing some trouble on older compilers with -march=native

I am probably missing a few sets, but these are the major ones, and it should give you an overview what to look for...

HTH
V.

PS. If it looks confusing - yes it is. x86/x86_64 is a gigantic mess from a point of view micro-architecture design.
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PostPosted: Sat Jul 16, 2011 7:53 pm    Post subject: Reply with quote

Thanks a lot again. I see we sorta came to the same conclusion about these. OT: it's interesting how Intel and AMD have cross-licensed their instruction sets, kinda :D . AMD is allowed to use the x86 instruction set and Intel in turn is allowed to use AMD x86_64 instruction set!

Ok. So it seems I may safely compile (almost) native Atom code on my laptop. Gonna try and report. I'm still trying to configure the beast with Fedora and am battling with the NetworkManager monster to have the wifi start so I can install Nvidia drivers and see how the thing behaves in graphics mode... :D
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