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Kobboi
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Joined: 29 Jul 2005
Posts: 673
Location: Belgium
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 Posted: Tue Feb 10, 2009 10:32 pm Post subject: L3 cache disabled? (lshw) |
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| I was inspecting some of my hardware using the GUI version of lshw, gtk-lshw. For the CPU, it shows the L3 cache as disabled. Is this normal? |
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poly_poly-man
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Joined: 06 Dec 2006
Posts: 2477
Location: RIT, NY, US
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| Posted: Tue Feb 10, 2009 11:34 pm Post subject: |
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what type of cpu do you have? Many don't have L3 cache, and sometimes might show like that.
Full output of cat /proc/cpuinfo, please.
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Kobboi
l33t
Joined: 29 Jul 2005
Posts: 673
Location: Belgium
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| Posted: Wed Feb 11, 2009 6:13 pm Post subject: |
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| Code: | $ cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 15
model : 2
model name : Intel(R) Pentium(R) 4 CPU 3.00GHz
stepping : 9
cpu MHz : 2998.547
cache size : 512 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 0
initial apicid : 0
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pebs bts cid xtpr
bogomips : 5997.09
clflush size : 64
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 15
model : 2
model name : Intel(R) Pentium(R) 4 CPU 3.00GHz
stepping : 9
cpu MHz : 2998.547
cache size : 512 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 1
initial apicid : 1
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pebs bts cid xtpr
bogomips : 5997.48
clflush size : 64
power management:
$ |
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poly_poly-man
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Joined: 06 Dec 2006
Posts: 2477
Location: RIT, NY, US
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| Posted: Wed Feb 11, 2009 8:21 pm Post subject: |
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yep - pentium 4's never had L3 cache - don't worry about it.
There's probably a checker in place that wants it to be there, but since it's non-existant, it shows "disabled".
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Monkeh
Veteran
Joined: 06 Aug 2005
Posts: 1656
Location: England
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| Posted: Wed Feb 11, 2009 9:08 pm Post subject: |
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| poly_poly-man wrote: | yep - pentium 4's never had L3 cache - don't worry about it.
There's probably a checker in place that wants it to be there, but since it's non-existant, it shows "disabled". |
Actually the Extreme Edition (read: Shit and expensive edition) had L3. |
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poly_poly-man
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Joined: 06 Dec 2006
Posts: 2477
Location: RIT, NY, US
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| Posted: Wed Feb 11, 2009 9:43 pm Post subject: |
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| Monkeh wrote: | | poly_poly-man wrote: | yep - pentium 4's never had L3 cache - don't worry about it.
There's probably a checker in place that wants it to be there, but since it's non-existant, it shows "disabled". |
Actually the Extreme Edition (read: Shit and expensive edition) had L3. |
I never really thought of that as p4 in my head...
anyway, his is not one - it appears to be a prescott
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